Standardized power formats have been used in purely digital designs, analog/mixed-signal (AMS) design, and digital/mixed-signal designs to describe power intent, power management data, power-specific data, or other data generally related to power (collectively “power data” hereinafter) at various stages of the electronic design automation (EDA) of these designs. These standardized power formats such as CPF (Common Power Format from “Si2 Common Power Format Specification” of Si2 or Silicon Integration Initiative) or UPF (Unified Power Format from IEEE or Institute of Electrical and Electronic Engineers in 1801-2009-IEEE Standard for Design and Verification of Low Power Integrated Circuits”) are directed at specifying power data for the design or specifying power intent and implementation of the design just once such that various EDA design tools may consistently use the power data to automatically insert power control features or to check that the result matches the power intent during the design process. General details about some exemplary standardized power formats may be found in “Si2 Common Power Format Specification”, Ver. 2.0, Silicon Integration Initiative, Inc., Feb. 14, 2011 and IEEE Standard “1801-2009-IEEE Standard for Design and Verification of Low Power Integrated Circuits”, IEEE Mar. 27, 2009, the content of both documents is hereby explicitly incorporated by reference for all purposes.
Nonetheless, power intent in a standardized power format may often be unavailable, incomplete, or erroneous in one or more stages of electronic design implementation. For example, power intent may be made available to synthesis, simulation, and/or verification tasks but not necessarily so for layout designers who create and complete the physical design for manufacturing the underlying electronic design. The ECO (engineering change order) or the ECN (engineering change notice) process that aims at effecting changes to the electronic design further exacerbates the issues because power intent is generally unavailable to a design engineer implementing the ECO or ECN process. Even if the power intent may be available in some cases, the power intent may be specified in one particular format (e.g., in a CPF file, an UPF file, etc.), the provided power intent may not be compatible with the EDA tools that are used to manipulate the electronic designs, and the power intent may often be incomplete or outdated so as to provide compromised or reduced usability.
Therefore, there exists a need for methods and apparatuses for implementing an electronic design with automatically generated power intent.